Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5

Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5

Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5

Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5,Breadboard-Friendly IC DIP-14 Pack of 5 Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate,Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 (Pack of 5): Industrial & Scientific, Fashion flagship store Quick delivery To provide you with the best trendy products. Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5 Juried Engineering CD4073BE CD4073 4073 CMOS.




Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5

Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 (Pack of 5): Industrial & Scientific. Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 (Pack of 5): Industrial & Scientific. The CD4073B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates 。 Medium-Speed Operation - tPLH, tPHL = 60 ns (typ.) at VDD = 10 V, 100% tested for quiescent current at 20 V 。 Maximum input current of 1 µA at 18 V over full package-temperature range: 100 nA at 18 V and 25°C 。 Noise margin (full package-temperature range) = 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V, Standardized, symmetrical output characteristics 。 5-V, 10-V, and 15-V parametric ratings, Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices" 。 The CD4073B AND gates, provide the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates. 。 。 。

Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5

Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5

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Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5

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Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5


Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 (Pack of 5): Industrial & Scientific, Fashion flagship store Quick delivery To provide you with the best trendy products.
Juried Engineering CD4073BE CD4073 4073 CMOS Triple 3-Input and Gate Breadboard-Friendly IC DIP-14 Pack of 5